דרושים בחברת שנהב

נמצאו 1 משרות
*המשרות באתר מיועדות לנשים וגברים כאחד
The candidate will be part of the coverage-driven verification team working on the next generation SSD product.
Candidate responsibilities include the following:
- Interact closely with design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly.

The candidate will be part of the coverage-driven verification team working on the next generation SSD product.
Candidate responsibilities include the following:
- Interact closely with design team.
- Create, define and develop stand-alone verification environments for digital IPs and test suites.
- Responsible for the planning, development and debugging of UVM test environment using SystemVerilog language, test sequences and directed tests.
- Develop test bench components like monitors, checkers, score-boards and bus functional models (BFMs).
- Run test regressions and debug failing tests to isolate and root cause failures.
- Report status to project leads. Drive resolution of issues with development teams quickly.

דרישות:

BSC in Electrical Eng. with at least 5 years of experience in related field.
Knowledge in SystemVerilog and UVM methodology.

מיקום המשרה: מרכז, שרון
סוג משרה: משרה מלאה
תאריך עדכון: 05/04/2020
קוד משרה: ASIC